
DS3911
Temperature-Controlled, Nonvolatile,
I2C Quad DAC
19
Maxim Integrated
Lower Memory, Register 06h–07h: VCC VALUE
Lower Memory, Register 10h–11h: DAC3 VALUE
Lower Memory, Register 12h–13h: DAC2 VALUE
Lower Memory, Register 14h–15h: DAC1 VALUE
Lower Memory, Register 16h–17h: DAC0 VALUE
POWER-ON VALUE
0000h
ACCESS
R
MEMORY TYPE
Volatile
06h
212
211
210
29
28
27
26
25
07h
24
23
22
21
20
0
BIT 7
BIT 0
Left-justified unsigned voltage measurement. To calculate the supply voltage, simply convert the hexadecimal
electrical characteristics table. The lower 3 bits always return zero.
POWER-ON VALUE
0000h
ACCESS
When EN = 1: R
ACCESS
When EN = 0: R/W
MEMORY TYPE
Volatile
10h, 12h,
14h, 16h
29
28
27
26
25
24
23
22
11h, 13h,
15h, 17h
21
20
SRAM
BIT 7
BIT 0
These registers are the left- justified digital 10-bit value used for their associated DAC output. The lower 6 bits
have no effect on device operation. At POR these registers are updated to the EEPROM value
DAC POR. When
the EN bit in DAC POR is set, this register is updated at the end of each temperature conversion, with the calcu-
lated result of values recalled from LUT and OFFSET LUT pointed to by
TINDEX.
REF
DAC
V
DAC VALUE
1024
=
×